This invention relates to a static protection device for protecting an internal circuit of a semiconductor device from a surge voltage applied to an input/output terminal.
A static protection device of a semiconductor device in a related art is configured, for example, as shown in FIG. 7. That is, in FIG. 7, a static protection device 30 of a semiconductor device comprises a diode 33 connected between an input/output terminal (IN/OUT) 31 for signal input/output and a ground terminal (GND) 32 so that a PN junction becomes reverse-biased when the circuit is operated.
FIG. 8 shows a layout of the static protection device 30 as a plane pattern. A pad 34 is connected to the input/output terminal 31 via input/output wiring 35 made of aluminum (Al) wiring. The diode 33 consisting of an N-type region 37 and a P-type region 38 is formed between the input/output terminal 31 and the ground terminal 32. The N-type region 37 is connected to the input/output wiring 35 through a contact window 39. The P-type region 38 is connected to the ground terminal 32 by ground wiring.
FIG. 9 shows the cross section of the semiconductor device incorporating the static protection device 30. The semiconductor device comprises an N-type semiconductor layer 42 formed on a surface of a P-type silicon (Si) semiconductor substrate 41 by epitaxial growth and the parts shown in FIGS. 7 and 8 further formed on the N-type semiconductor layer 42. Isolation regions 40 for element separation are formed in the N-type semiconductor layer 42. An N+-type buried layer 44 is formed between the P-type silicon semiconductor substrate 41 and the N-type semiconductor layer 42. Numeral 45 denotes a silicon oxide film. A PN-junction diode 33 is formed in an element region 36. That is, a P+-type region 38 and an N+-type region 37 are formed away from each other in a lateral direction on a surface of the N-type semiconductor layer 42. The PN junction between the P+-type region 38 and the N+-type region 37 forms the diode 33. The N-type region 37 is connected to input/output wiring 35 and the P-type region 38 is connected to ground wiring 43.
However, according to the specification of IC, there is possibility that the potential of the input/output terminal becomes below the ground potential. In such a case, the diode is regarded as a forward-biased diode and the breakdown voltage thereof becomes the forward direction threshold voltage of the PN junction. Namely, the reverse-biased protection cannot be assured with respect to the internal circuit of the IC.
Another static protection device of a semiconductor device in a related art configured as shown in FIG. 10 is also available. That is, in FIG. 10, a static protection device 50 of a semiconductor device comprises an NPN transistor 53 connected between an input/output terminal (IN/OUT) 51 for signal input/output and a ground terminal (GND) 52 so that a PN junction becomes reverse-biased at the circuit operation time.
FIG. 11 shows a plane layout of the static protection device 50. A pad 54 is connected to the input/output terminal 51 via input/output wiring 55 made of aluminum (Al) wiring. The NPN transistor 53 consisting of an N-type region 56, a P-type region 57, and an N-type region 58 is formed between the input/output terminal 51 and the ground terminal 52. The N-type region 56 is connected to the input/output wiring 55 through a contact window 59. A window 60 is opened in an isolation region in the vicinity of the NPN transistor 53 for connection to the ground terminal by ground wiring 61.
FIG. 12 shows the cross section of the semiconductor device incorporating the static protection device 50. The semiconductor device comprises an N-type semiconductor layer 63 formed on a surface of a P-type silicon (Si) semiconductor substrate 62 by epitaxial growth and the parts shown in FIGS. 10 and 11 further formed on the N-type semiconductor layer 63. Isolation regions 67 for element separation are formed in the N-type semiconductor layer 63. An N+-type buried layer 66 is formed between the P-type silicon (Si) semiconductor substrate 62 and the N-type semiconductor layer 63. Numeral 64 denotes a silicon oxide film. An N-type region 56, an N-type region 58, and a P-type region 57 are formed on a surface of the N-type semiconductor layer 63. The N-type region 56, the N-type region 58, and the P-type region 57 form the NPN transistor 53. The N-type region 56 is connected to input/output wiring 55 and the N-type region 58 and the P-type region 67, 68 are connected to ground wiring 61.
The PN junction between the N-type region 56 and the P-type region 57 is equivalently regarded as the reverse-biased diode shown in FIG. 7. Therefore, if the NPN transistor 53 is provided for a static protection device for an IC wherein there is possibility that the potential of the input/output terminal becomes below the ground potential, the reverse-biased protection cannot be assured with respect to such IC according to the discussion described above.
It is therefore an object of the invention to provide a static protection device for preventing an IC operation problem from arising if an input/output terminal falls below ground (GND) potential.
In order to achieve the above object, in one of device regions of an integrated semiconductor device having an input/output terminal and a ground terminal, an emitter terminal of the PNP transistor is connected to the input/output terminal, and a collector terminal of the PNP transistor is connected to the ground terminal to realize a static protection device.